125 lines
4.2 KiB
C
125 lines
4.2 KiB
C
/*
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* this is the internal transfer function.
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*
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* HISTORY
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* 07-Sep-16 Add clang support using x register naming. Fredrik Fornwall
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* 13-Apr-13 Add support for strange GCC caller-save decisions
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* 08-Apr-13 File creation. Michael Matz
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*
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* NOTES
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*
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* Simply save all callee saved registers
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*
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*/
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#define STACK_REFPLUS 1
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#ifdef SLP_EVAL
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#define STACK_MAGIC 0
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#define REGS_TO_SAVE "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", \
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"x27", "x28", "x30" /* aka lr */, \
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"v8", "v9", "v10", "v11", \
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"v12", "v13", "v14", "v15"
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/*
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* Recall:
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asm asm-qualifiers ( AssemblerTemplate
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: OutputOperands
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[ : InputOperands
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[ : Clobbers ] ])
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or (if asm-qualifiers contains 'goto')
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asm asm-qualifiers ( AssemblerTemplate
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: OutputOperands
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: InputOperands
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: Clobbers
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: GotoLabels)
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and OutputOperands are
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[ [asmSymbolicName] ] constraint (cvariablename)
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When a name is given, refer to it as ``%[the name]``.
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When not given, ``%i`` where ``i`` is the zero-based index.
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constraints starting with ``=`` means only writing; ``+`` means
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reading and writing.
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This is followed by ``r`` (must be register) or ``m`` (must be memory)
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and these can be combined.
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The ``cvariablename`` is actually an lvalue expression.
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In AArch65, 31 general purpose registers. If named X0... they are
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64-bit. If named W0... they are the bottom 32 bits of the
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corresponding 64 bit register.
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XZR and WZR are hardcoded to 0, and ignore writes.
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Arguments are in X0..X7. C++ uses X0 for ``this``. X0 holds simple return
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values (?)
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Whenever a W register is written, the top half of the X register is zeroed.
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*/
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static int
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slp_switch(void)
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{
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int err;
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void *fp;
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/* Windowz uses a 32-bit long on a 64-bit platform, unlike the rest of
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the world, and in theory we can be compiled with GCC/llvm on 64-bit
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windows. So we need a fixed-width type.
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*/
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int64_t *stackref, stsizediff;
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__asm__ volatile ("" : : : REGS_TO_SAVE);
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__asm__ volatile ("str x29, %0" : "=m"(fp) : : );
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__asm__ ("mov %0, sp" : "=r" (stackref));
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{
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SLP_SAVE_STATE(stackref, stsizediff);
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__asm__ volatile (
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"add sp,sp,%0\n"
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"add x29,x29,%0\n"
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:
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: "r" (stsizediff)
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);
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SLP_RESTORE_STATE();
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/* SLP_SAVE_STATE macro contains some return statements
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(of -1 and 1). It falls through only when
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the return value of slp_save_state() is zero, which
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is placed in x0.
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In that case we (slp_switch) also want to return zero
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(also in x0 of course).
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Now, some GCC versions (seen with 4.8) think it's a
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good idea to save/restore x0 around the call to
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slp_restore_state(), instead of simply zeroing it
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at the return below. But slp_restore_state
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writes random values to the stack slot used for this
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save/restore (from when it once was saved above in
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SLP_SAVE_STATE, when it was still uninitialized), so
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"restoring" that precious zero actually makes us
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return random values. There are some ways to make
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GCC not use that zero value in the normal return path
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(e.g. making err volatile, but that costs a little
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stack space), and the simplest is to call a function
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that returns an unknown value (which happens to be zero),
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so the saved/restored value is unused.
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Thus, this line stores a 0 into the ``err`` variable
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(which must be held in a register for this instruction,
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of course). The ``w`` qualifier causes the instruction
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to use W0 instead of X0, otherwise we get a warning
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about a value size mismatch (because err is an int,
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and aarch64 platforms are LP64: 32-bit int, 64 bit long
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and pointer).
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*/
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__asm__ volatile ("mov %w0, #0" : "=r" (err));
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}
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__asm__ volatile ("ldr x29, %0" : : "m" (fp) :);
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__asm__ volatile ("" : : : REGS_TO_SAVE);
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return err;
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}
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#endif
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